Referenced Items are not available for this document.
A dual-mode ΣΔ modulator is designed to meet the specifications of a WCDMA/GPRS receiver and is composed of a single-bit second-order modulator followed by a multi-bit stage that adapts performance to broadband signals. The modulator achieves 82dB and 70dB of dynamic range over bandwidths of 100kHz and 1.92MHz, respectively, and dissipates 4.3mW from a 1.2V supply. The circuit is implemented in 0.13μm CMOS technology and occupies an active area of 0.2mm2.
Published in:
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Date of Conference: 2003
- Page(s):
- 58 - 59 vol.1
- ISSN :
- 0193-6530
- Print ISBN:
- 0-7803-7707-9
- INSPEC Accession Number:
- 7785697
- Digital Object Identifier :
- 10.1109/ISSCC.2003.1234206
- Product Type:
- Conference Publications
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