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Total-dose radiation hardness assurance is reviewed for MOS and bipolar devices and integrated circuits (ICs), with an emphasis on issues addressed by recent revisions to military and commercial standard test methods. Hardness assurance typically depends upon sample tests of a subgroup of devices or circuits to determine whether the full group meets its performance and functionality requirements to a desired confidence level. The dose rates of many standard test methods match neither the very high dose rates of some military environments nor the very low dose rates of most space environments. So, one must ensure that hardness assurance test plans address device response in the radiation environment of interest. An increasing emphasis has been placed over the last few decades on standardized test procedures to qualify devices for use in the natural space radiation environment. Challenging issues for defining test methods for space environments are nMOS transistor threshold-voltage rebound and enhanced low-dose-rate sensitivity for linear bipolar devices and ICs. Effects of preirradiation elevated temperature stress on MOS radiation response are also a significant concern. Trends are identified for future radiation hardness tests on advanced microelectronics technologies.