By Topic

A 85-dB dynamic range multibit delta-sigma ADC for ADSL-CO applications in 0.18-μm CMOS

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
R. Gaggl ; Infineon Technol. Austria, Villach, Austria ; A. Wiesbauer ; G. Fritz ; C. Schranz
more authors

A high-resolution multibit sigma-delta analog-to-digital converter (ADC) implemented in a 0.18-μm CMOS technology is introduced. The circuit is targeted for an asymmetrical digital subscriber line (ADSL) central-office (CO) application . An area- and power-efficient realization of a second-order single-loop 3-bit modulator with an oversampling ratio of 96 is presented. The ΣΔ modulator features an 85-dB dynamic range over a 300-kHz signal bandwidth. The measured power consumption of the ADC core is only 15 mW. An innovative biasing circuitry is introduced for the switched-capacitor integrators.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:38 ,  Issue: 7 )