By Topic

Efficient memory IP design for HDTV coding applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Shih-Chang Hsia ; Dept. of Comput. & Commun. Eng., Nat. Kaohsiung First Univ. of Sci. & Technol., Taiwan

The memory intellectual property (IP) is a key component for video coding systems as using system on one chip design methodology. In this paper, cost-effective memory design and complex address generation are presented for high-definition television coding applications. The addressing method uses a bit-allocation approach to simplify the computational circuit and significantly improves the memory access speed. For the bit-allocation requirement, a new memory structure is designed using pseudoaddress decoding concept to reduce the I/O complexity and to shorten the access time. The memory IP integrated to practical video coding systems is also presented. The experiments show that the proposed memory IP can provide better performance than the conventional one.

Published in:

IEEE Transactions on Circuits and Systems for Video Technology  (Volume:13 ,  Issue: 6 )