By Topic

A dual-pulse-clock double edge triggered flip-flop for low voltage and high speed application

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Kuo-Hsing Cheng ; Dept. of Electr. Eng., Tamkang Univ., Tamsui, Taiwan ; Yung-Hsiang Lin

In this paper, a low voltage dual-pulse-clock double edge triggered D-flip-flop (DPDET) is proposed. The DPDET flip-flop uses a split output latch clocked by a short pulse train. Compared to the previously reported double edge triggered flip-flops, the DPDET flip-flop uses only six transistors with two transistors being clocked, operating correctly under low supply voltage. The total transistors count is reduced to improve speed and power dissipation in flip-flop. The number of transistors is reduced by 40% to 70% compared to other double edge triggered flip-flops. Based on 0.35um single-poly quad-metal CMOS technology, the HSPICE simulation results show that the operating speed of the DPDET flip-flop is 2.7 GHz at a 3.3V supply voltage. The operating speed of the DPDET flip-flop is increased about 41% and 49% in compared with others for 3.3V and 2.5V supply voltage, respectively. The power dissipation is reduced about 36% and 29% in compared with others for 3.3V and 2.5V supply voltage, respectively. Moreover, the DPDET flip-flop can be used in a 0.9V supply voltage with 224 MHz operating speed. Therefore the proposed DPDET flip-flop is suitable for low supply voltage and high speed CMOS applications.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:5 )

Date of Conference:

25-28 May 2003