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A regular (two-flop) synchronizer and six multi-synchronous synchronizers are implemented on a programmable logic device and are measured. An experimental system and method for measuring synchronizers and metastable flip-flops are described. Two separate settling time constants are shown for a metastable flop, confirming earlier results of Dike and Burton . Clocking cross-talk between asynchronous clocks is demonstrated. The regular synchronizer is useful for communications between asynchronous clock domains, while the other synchronizers can provide higher bandwidth communications between multi-synchronous and mesochronous domains.
Date of Conference: 12-15 May 2003