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A brand-new floating-point Digital Speech Signal Processor VLSI (DSSP), intended for a wide range of applications in speech processing, is developed. For speech applications, a wide dynamic range vector operation that includes FFT and complex arithmetic is necessary in executing a highly-complicated coding algorithm that treats a large amount of windowed data collectively. To meet this requirement, the floating-point data format and hardware architecture is extensively studied. The DSSP, which is fabricated using 2.5um CMOS technology, completes almost all the floating-point operations within a 150ns machine-cycle.
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '85. (Volume:10 )
Date of Conference: Apr 1985