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Si-SiO/sub 2/ interface trap densities can be measured in MOS structures with ultrathin oxides using charge pumping (CP) and small gate pulses. This presents three decisive advantages with respect to the conventional large gate voltage swing approach. First, the extraction is simple as carrier emission does not contribute to the CP signal so that the CP current magnitude directly reflects the interface trap density. Second, the tunneling current is strongly reduced allowing a more easy extraction of the CP signal and third, such a reduction prevents the insulator and the insulator-silicon interface from any degradation. By doing so, Si-SiO/sub 2/ interface trap densities are measured in MOSFETs with oxides which are 1.8 and 1.3 nm thick.