Skip to Main Content
The current status of a research program at Carnegie-Mellon University aimed at the formulation of a hierarchical design methodology for digital VLSI circuits is described. In addition, this paper describes a set of computer aids which supports this methodology. One of the goals of this work is to provide a design environment which allows for a significant reduction in time between the initial concept of a complex digital system and the generation of masks. Another goal is to allow the designer to efficiently explore a number of design alternatives.