Referenced Items are not available for this document.
A high performance operational amplifier 300 mil/SUP 2/ in area has been designed and fabricated in a standard n-channel silicon-gate enhancement/depletion MOS process. Specifications achieved include open-loop gain, 1000; power consumption, 10 mW; common-mode range within 1.5 V of either supply rail; unity-gain bandwidth, 3.0 MHz with 80/spl deg/ phase margin; RMS input noise (2.5 Hz-46 kHz), 25 /spl mu/V; C-message weighted noise -5 dBrnC; and 0.1-percent settling time, 2.5 /spl mu/s.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:13
,
Issue:
6
)
Date of Publication: Dec. 1978
- Page(s):
- 760 - 766
- ISSN :
- 0018-9200
- Digital Object Identifier :
- 10.1109/JSSC.1978.1052047
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 January 2003
- Issue Date :
- Dec. 1978
- Sponsored by :
- IEEE Solid-State Circuits Society
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