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A large-signal model is derived for the substrate fed integrated injection logic (I/SUP 2/L) gate which is suitable for computer-aided circuit design and the optimization of the physical structure. Since the analysis extends the Ebers-Moll model it differs from the existing models in that the effects of high-level injection and injector debiasing are included. Furthermore, heavy doping effects are included in the calculation of currents and minority carrier storage. The analysis of the oxide isolated structure predicts circuit delays of less than 5 ns at 50 /spl mu/A.