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This paper examines a model of LSI device failure and the departure from Poisson statistics that it necessitates. By visually mapping anodically decorated transistors, the authors found that in highly defective sites, emitter-collector shorts-pipes-tend to collect in clusters of totally defective areas. Less defective sites have a nearly random distribution of defects, though some limited clustering may still exist. In general, a slightly curved relationship is obtained when the logarithm of actual yield is plotted versus area. However, for a small enough area, such as a single chip, one can make a linear approximation and use it to estimate the fraction of the area that is totally defective, and the defect density. The paper describes an analytical method of modeling device failures, and of projecting yields for areas larger than the data base from which the parameters of the yield equation were estimated.