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Bus encoding architecture for low-power implementation of an AMBA-based SoC platform

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4 Author(s)
S. Osborne ; ALBA Campus, Inst. for Syst. Level Integration, Livingston, UK ; A. T. Erdogan ; T. Arslan ; D. Robinson

Advanced microcontroller bus architecture (AMBA) is rapidly becoming the de facto standard for new system-on-chip (SoC) designs. The bus protocol is complex, making any peripherals that can interface to it valuable intellectual property (IP). This paper presents a low-power bus encoding architecture which is able to deal with the complex advanced high-performance bus (AHB) protocol within AMBA, which involves multiple burst transfers. The architecture is targeted for a low-power SoC platform to be used in a miniaturised low power application area. The paper describes the SoC platform and the bus encoding architecture, and provides results with a design synthesised at 0.35 μm CMOS technology indicating up to 22% power saving

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IEE Proceedings - Computers and Digital Techniques  (Volume:149 ,  Issue: 4 )