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A general-purpose vector-quantization (VQ) processor featuring high-speed and versatile winner search functions is presented. A new two-dimensionally bit-propagating scheme has been employed in the winner-take-all (WTA) circuit. As a result, the maximum/minimum value identification for 6 b 128 inputs in a single clock cycle has been accomplished, which is five times faster than the conventional approach (18 b comparison is carried out in three clock cycles). In addition, the new block addressing scheme developed in the present work enables various options in WTA operations. The chip was fabricated in a standard CMOS process and the operation was demonstrated by application to handwritten character recognition as an example.
Date of Conference: 13-15 June 2002