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A 1-V 3.5-mW CMOS switched-opamp quadrature IF circuitry for Bluetooth receivers

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3 Author(s)
Cheung, V.S.-L. ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China ; Luong, H.C. ; Wing-Hung Ki

Based on only half-delay switched-capacitor integrators, a 7/sup th/-order IF-filter and a 3/sup rd/-order /spl Sigma//spl Delta/ modulator using a novel noise-shaping extension technique are implemented for a Bluetooth receiver in a 0.35-/spl mu/m CMOS process. At a 1-V supply, the quadrature IF circuitry achieves a measured IIP3 of -3 dBm at a nominal gain of 24 dB through a 48-dB variable-gain control with a power dissipation of 3.5 mW.

Published in:

VLSI Circuits Digest of Technical Papers, 2002. Symposium on

Date of Conference:

13-15 June 2002