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This paper explores different trade-offs associated with the design of analog VLSI chips. These trade-offs are related to the necessity of keeping the analog accuracy while taking advantage of the possibility of reducing the power consumption, increasing the operation speed, and reducing the area occupation (i.e., increasing the density of processors), as fabrication technologies scale down into deep sub-micron.
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on (Volume:5 )
Date of Conference: 2002