Partial order reduction in verification of wheel structured parameterized circuits

It is known that many systems have the regular structure constructed from several kinds of basic modules. We focus on parameterized asynchronous circuits with a wheel structure, which consists of one kernel module and many identical symmetry modules, and aim at verifying such systems of arbitrary sizes. In this paper we propose a fully automatic state enumeration procedure for wheel structured systems with an infinite number of symmetry modules based on the state representation using finite automata. We also apply a partial order reduction algorithm for the verification of the wheel structured systems in order to reduce the average computational costs, and demonstrate the efficiency of the proposed algorithm by several experimental results.