Digital IC functions with differential cascode voltage switch circuits

A circuit-design technique for CMOS differential cascode voltage-switch (DCVS) circuit cells is briefly described. The cells are implemented in CMOS technology. DCVS and conventional gate logic implementations are compared. It is reported that the CMOS DCVS circuit cells require a smaller layout area than conventional gate logic. In the DCVS circuit of this example, 48% less silicon area was required.<
>