A Power-Efficient TVC-Based Fast Auto-Frequency Calibration for PLLs

This brief presents a low-power, time-to-voltage converter (TVC)-based auto-frequency calibration (AFC) technology for phase-locked loops (PLLs). Instead of using power-hungry counters and finite-state machine (FSM), the proposed AFC uses TVC and comparator circuits to get the frequency information. Relying on a simple digital operable divide-by-3 (O-Div3) circuit, sampling procedure of TVCs is easy to be realized, which avoids the accumulation of multiple reference periods. Meanwhile, reference frequency is reused, that reduces the cost of extra clock. Beyond that, a binary-like search algorithm is proposed without frequency error. The 4.7-6.8-GHz PLL is implemented in 65-nm CMOS process. The total AFC setting time is less than 750 ns under 20-MHz reference, and consumes below 0.1 mW. Simultaneously, the adopted PLL achieves −116.2-dBc/Hz@1MHz phase noise when generating 4.89-GHz output.