A 3-V 12-bit second order sigma-delta modulator design in 0.8-/spl mu/m CMOS

This paper examines the design and simulation of a 12-bit sigma-delta modulator that operates from a single 3-V power supply. The proposed modulator has been designed with fully-differential switched-capacitor integrators implemented with folded-cascode operational amplifiers. The main feature of the designed modulator is its simplicity. It shows that it is possible to design a precise modulator of moderate Signal-to-Noise Ratio (SNR) using simple circuits, which do not require precise component matching and high precision components or trimming. The modulator achieves a SNR higher than 74 dB for all the simulated cases with an oversampling ratio of 128 and an oversampling frequency of 2.56 MHz. The modulator was designed in a 0.8-/spl mu/m CMOS technology and it measures 560 /spl mu/m /spl times/ 680 /spl mu/m.