Quantifying the reliability of embedded systems by automated analysis

In embedded systems development safety and reliability are important quality characteristics. It is thus required to determine the reliability and safety of a complete system including hardware and software. It is reasonable to analyze particular failures that may cause, for example, safety critical situations. The basic idea of our approach is the automated generation of so-called fault trees based on the source code of the software. These may be combined with fault trees based on the electronic circuit design of the hardware. It is important to do the generation in such a way that the software and the hardware fault trees can be composed into a valid fault tree of the system. Fault tree generation is a largely automated approach. We have implemented a prototype of a fault tree generation tool that is capable to generate fault trees based on C++ code. The fault tree generation tool for electronic circuits has already been used to analyze failure situations in industrial automation applications. If a structural approach is not applicable, stochastic techniques may be used. We developed the reliability assessment tool RAT that supports reliability analysis of software systems.