A novel current-sharing control technique for low-voltage high-current voltage regulator module applications

Future generations of microprocessors are expected to exhibit much heavier loads and much faster transient slew rates. Today's voltage regulator module (VRM) will need a large amount of extra decoupling and output filter capacitors to meet future requirements, which will basically make the existing VRM topologies impractical. As a candidate topology, the interleaved quasisquare-wave (QSW) VRM exhibits very good performance, such as a fast transient response and a very high power density. The difficulty with the application of the interleaved parallel technology is the current-sharing control. In this paper, a novel current-sensing and current-sharing technique is proposed. With this technique, current sharing can be controlled simply in parallel converters without a current transformer and current-sensing resistors. In addition, this technique can be easily integrated with an IC chip. The four-module paralleled QSW VRM is used to evaluate this technique. Experimental results verify that with this technique, the VRM has a high power density, high efficiency and a fast transient response. The concept of the current sharing technique is also generalized and extended.