Plasma etching optimization of oxide/nitride/oxide interpoly dielectric breakdown time in flash memory devices

The breakdown time of flash memory oxide/nitride/oxide (ONO) layer t/sub bd/ under positive constant current stressing has been found to be closely related to the cumulative extent of (over)etch of the tungsten silicide, control polysilicon, and ONO layers, i.e., /spl Sigma/(/spl Lambda/OE). An empirical first-order relation between t/sub bd/ and /spl Sigma/(/spl Lambda/OE) has been derived to facilitate the plasma etch recipe optimization. This has led to a four-fold increase in the average t/sub bd/ across a 200-mm wafer to 208 s. More importantly, the spread in t/sub bd/ has been tightened to /spl sim/5%, which is down from /spl sim/54%.