Theoretical study of deep-trap-assisted anomalous currents in worst-bit cells of dynamic random-access memories (DRAM's)

High-level leakage (anomalous) currents in worst-bit cells of dynamic random-access memory (DRAM) devices, i.e., in the tail region of the cumulative probability of the data retention time distribution, are analyzed by utilizing device simulation. Deep-traps are assumed to be located near the metallurgical junction, and the anomalous current is evaluated as a function of the number of traps as well as a function of energy level (E/sub t/) and capture cross-section (/spl sigma/). Calculated leakage currents are compared with measured data. It is found that: (1) acceptor-type deep-traps located in an n-region, as well as donor-type deep-traps in a p-region, can generate the high-level current flowing through pn junctions; (2) heavy-metal contamination of the order of 10/sup 3/ atoms/cell can generate the high-level current when E/sub t/ is situated near the center in the energy gap and /spl sigma/ is around 10/sup -15/ cm/sup 2/; and (3) current induced by point defects is two to six orders of magnitude lower than that induced by the heavy-metal contamination. Several sets of material constants are examined for obtaining the best fit between the calculated current and measured data. This examination theoretically predicts Zn and Au atoms (of the order of 10/sup 3/ per unit cell) as the origins of the anomalous current in worst-bit cells.