Analog VLSI model of binaural hearing

The stereausis model of biological auditory processing is proposed as a representation that encodes both binaural and spectral information in a unified framework. A working analog VLSI chip that implements this model of early auditory processing in the brain is described. The chip is a 100000-transistor integrated circuit that computes the stereausis representation in real time, using continuous-time analog processing. The chip receives two audio inputs, representing sound entering the two ears, computes the stereausis representation, and generates output signals that can directly drive a color CRT display. Outputs from the chips for a variety of artificial and speech stimuli are shown.<
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