Development of Bumpless Stacking With Bottom–Up TSV Fabrication

A 3-D integration technology using bumpless stacking based on a new bottom-up Cu electroplating method without backside Cu chemical-mechanical planarization removal is presented in this paper. The approach successfully achieves via plating without thick Cu overburden by probing unique bottom electrodes for different I/O ports of TSV without additional steps in the conventional processes. The concepts and fabrication processes are described in detail. The results obtained from through-silicon via (TSV) daisy chains show excellent electrical characteristics and good reliability in leakage current measurement. The proposed approach therefore has potential for low-cost via-last 3-D integration.