Electrothermal Evaluation of Single and Multiple Solder Void Effects on Low-Voltage Si MOSFET Behavior in Forward Bias Conditions

Solder void thermal effects on power module performance and reliability were investigated a long time ago. The final goal is to determine void acceptability criteria or to remove them. Our approach is not to offer a more efficient method for neglecting void formation, but to suggest a method for optimizing void thresholding from multiphysical viewpoint. The major achievement is in the complete combination of modeling, experiments, and optimization for void effect evaluation purpose. Especially, for the first time, a real new highly coupled and detailed 3-D FEM electrothermal model of low-voltage silicon MOSFET and the bonding wires in steady state has been introduced. For the single-void case, the simulation results highlight local void effects on thermal performance of MOSFET in the void area. However, no significant consequence on electrical performance is observed. Besides, the model shows a high dependence between void effects and back-side metallization parameters. Electrical and thermal measurements performed on various single-void configurations of experimental MOSFET prototypes offer a good agreement with the numerical results. The study is then expanded to the multivoid case. The criticality of multivoids corresponds to that of the most critical single void if the voids are not coalesced. These results offer an idea for a more optimized void inspection method in production line.