Numerical Simulation and Analysis of the Switching Performance for Printable Low-Voltage Organic Thin-Film Transistors in Active-Matrix Backplanes

To achieve low-voltage organic thin-film transistors (OTFTs) with printing or coating processes over large area, a thick gate dielectric layer is preferred. Taking this into consideration, a common solution for low-voltage OTFTs is using large-permittivity (high- k) dielectric material to enlarge the gate dielectric capacitance. Our recent work shows that reducing the subgap density of states (DOS) at the channel can also help to achieve low-voltage OTFTs. This approach does not need large gate dielectric capacitance, and thus a low- k and thick gate dielectric layer can be used. In this work, device/circuit mixed-mode simulations are carried out to compare the performance of the two type low-voltage OTFTs as switches in active-matrix backplanes. It is shown that the low-voltage OTFT with reduced subgap DOS can achieve faster charging and discharging. The less parasitic and storage capacitance with the low- k dielectric layer would also reduce the required dynamic power.