Comparison of Pinning Voltage Estimation Methods in Pinned Photodiode CMOS Image Sensors

The pinning voltage is a key design parameter of pinned photodiode CMOS image sensors which significantly affects the device performances and which is often used by manufacturers to monitor production lines and for the optimization of technological processes. This paper presents a comparative study of pinning voltage estimation methods, which are based on both electrical measurements performed on isolated test structures (or on test structures arrays) and in-pixel measurements. It is shown, with the support of simulations and experimental measurements, that not all the estimation methods provide an absolute value of the pinning voltage. Moreover, this paper demonstrates that the commonly accepted theoretical definition of the pinning voltage does not correspond to the physical parameter which is measured with the existing methods.