Multi drop net topologies for MCM off chip interconnection lines

The paper describes different topologies for off-chip interconnection lines on a multichip module. The impact of different multi-drop net configurations on the delay is shown for various distances between sending and receiving chips. These results are compared with the timing of two-point connections in thin films and glass ceramics. The impact of the slope at the receiving end of the nets is discussed in particular. Finally, the influence of coupled noise from neighbouring lines is presented.