Efficacy of Ar in reducing the kink effect on floating-body NFD/SOI CMOS

Despite recent reports of high speed nonfully-depleted (NFD) silicon-on-insulator (SOI) CMOS processes (Assaderaghi et al. 1997), there are growing concerns about SOI scalability due to the off-state leakage current induced by parasitic bipolar effects (Chau et al. 1997). To reduce these, Ar implantation into source/drain regions, creating recombination centers in the silicon, has been proposed (Ohno et al. 1995). In this work, the effects of Ar implantation on device performance at different temperatures and supply voltages are examined for deep submicron technologies.