A Pulsed Dynamic Load Modulation Technique for High-Efficiency Linear Transmitters

A pulsed dynamic load modulation (PDLM) technique is introduced for a high-efficiency linear transmitter for wideband modulation signals with a large peak-to-average power ratio. By combining the dynamic load modulation technique with the class-S amplifier concept, the pulse-width-modulated envelope signal is applied to the switchable-load matching circuit so that the power amplifier (PA) can operate near optimum efficiencies in the backed-off power region. A comprehensive analysis is presented to prove the circuit concept using the simplified theory, followed by the full circuit simulations using harmonic-balance analysis. The effect of nonideal terminations at the intrinsic device plane is also analyzed to understand the potential issues in the practical implementation. The proof-of-concept circuits are designed and fabricated using a silicon-on-insulator CMOS process, where a two-stage PA, a load switch, a pulse-width modulation circuit, and a switch driver are implemented in two separate chips. The fabricated PDLM PA operating at 837 MHz shows continuous-wave efficiencies in excess of 44% across the 6-dB power back-off region from the saturated output power. A power-added efficiency as high as 43.4% is achieved at the output power of 24.8 dBm using 10-MHz-bandwidth 16 quadrature amplitude modulation long-term evolution (LTE) signals. Unlike the case of the envelope-tracking techniques, the PDLM PA of this work maintains the overall efficiencies as the LTE signal bandwidth increases. The PDLM PA of this work can provide a potential solution for high-efficiency PAs for future mobile terminals using wideband modulation signals.