A 40GS/s low-power BiCMOS comparator for ultra-high speed ADC

This paper presents a 40GS/s low-power Bipolar Complementary Metal-Oxide Semiconductor (BiCMOS) latched comparator for analog to digital converter (ADC). In this design, to achieve a low-power consumption and higher bandwidth, an active inductor load comprised by a BiCMOS transistor and a resister comparator is adopted in the circuit. Operating at Nyquist, the comparator can sample up to 40GS/s with an input sensitivity of less than 10 mV. The comparator is fabricated in 0.18μm SiGe BiCMOS technology with a chip area of 80×67 μm
²
. The total power consumption is approximately 28 mW from a 3.3V power supply. The proposed comparator can be applied to ultra-high-speed and low-power ADC.