DSP-based implementation of soft Viterbi decoder for power line communications

When using power line communications (PLC) modems for Smart Grids (SG), achieving fast and reliable data transmission is one of the key issues. This paper investigate a soft Viterbi decoder to reduce errors effects of noises and attenuations in Spread Frequency Shift Keying (S-FSK) communication scheme. Through numerical simulations, the improvements of the proposed Viterbi decoder are shown in terms of BER performance. Furthermore, practical realization on low-cost embedded processor is discussed. The whole design of a narrowband S-FSK based PLC modem has been implemented and optimization for real time processing.