CMOS active pixel image sensor with combined linear and logarithmic mode operation

An active photodiode 4/spl times/64 image sensor array was designed and fabricated using a 0.5 /spl mu/m CMOS process. The sensor includes on-chip timing and control as well as correlated double sampling for readout. The operation of the sensor is selectable between a linear integration mode and a logarithmic mode using the same array of pixels.