Design of test structures for electrical and reliability measurements in a 2.5D TSV interposer

A 2.5D three-dimensional (3D) silicon interposer with through silicon vias (TSV) was designed and fabricated. All structures are for the purpose of evaluating the design and layout, electrical testing, and to evaluate process reliability of the 2.5D interposer. Three levels are tested: chip, interposer and plastic substrate. The paper details the layout of the three levels, the principal electrical tests and extraction of TSV parameters such as the resistance of TSVs pads and lines. The design structure also tests the reliability of the 2.5D package structure by thermal stressing. The electrical test results are discussed in relation to applicability at high frequencies.