Self-aligned III-V MOSFETs: Towards a CMOS compatible and manufacturable technology solution

We demonstrate self-aligned fully-depleted III-V MOSFETs using CMOS-compatible device structures and manufacturable process flows. Processes with good manufacturability and scalability, such as, gate definition and spacer formation using RIE, and formation of self-aligned source/drain extensions (SDE) and self-aligned raised source/drain (RSD), have been established on III-Vs. We demonstrate short-channel devices down to gate length L
G
= 30 nm. Our best short-channel devices exhibit peak saturation transconductance G
MSAT
= 1140 μS/μm at L
G
= 60 nm and supply voltage V
DD
= 0.5 V.