Random interleaved pipeline countermeasure against power analysis attacks

An RTL countermeasure intended to protect the AddRoundKey and SubByte steps of the AES algorithm against DPA or CPA attacks has been proposed and tested on an AES encoding coprocessor implemented on FPGA. Experimental results based on first order CPA attacks confirmed the effectiveness of the proposed countermeasure, especially in protecting the SBOX output, showing that even with the acquisition of 300000 power curves, the absolute value of correlation function is embedded in the measured noise floor and there are no peaks able to reveal the encryption key.