Failure rate calculation for NMOS devices under multiple failure mechanisms

The failure rate for NMOS devices is modelled by sum-of-failure-rate, i.e., the one for HCI mechanism and the one for TDDB failure mechanism. The least squares method is used to estimate the unknown parameters in HCI failure rate model and TDDB failure rate model, respectively. The hypothesis tests show that the regression model for HCI (TDDB) has good fitness and high significance. These results are verified by a numerical example.