High-level synthesis using genetic algorithms for dynamically reconfigurable FPGAs

We present an approach to high level synthesis for dynamically reconfigurable FPGAs (DR FPGAs). The dynamic nature of the DR FPGAs introduces some new automated synthesis problems. Existing methodologies do not handle the problem as they often perform dynamic scheduling only, and do not consider the tight interdependency between binding and scheduling. In our synthesis approach, a model is introduced to express the partition and binding task of high level synthesis for dynamically reconfigurable FPGAs. Furthermore, an efficient generic algorithm is presented, which naturally integrates interdependent tasks (partitioning, binding and scheduling) into one genetic algorithm.