1 GHz CMOS down-conversion mixer

A 1 GHz CMOS down-conversion mixer is described. The mixer is of differential architecture where the common-mode feedback circuit is eliminated by employing robust loads. Cascode stages are used to reduce the LO-to-RF feedthrough which is measured to be -79 dB. A prototype mixer was implemented in a standard 0.8 /spl mu/m CMOS process and consumes 7.3 mW at 3.3 V supply. The power conversion gain is -0.8 dB. The noise figure and the input IP3 are 19 dB and 0.6 dBm, respectively.