On the Clock Offset Estimation in an Improved IEEE 1588 Synchronization Scheme

IEEE 1588 specifies a dedicated protocol, the precision time protocol (PTP) for clock synchronization in a networked measurement and control system. It plays an important role in the packet-based network synchronization mechanism. However, the performance of the conventional IEEE 1588 synchronization algorithm is affected by the asymmetric link and random delay problems. This paper proposes an improved IEEE 1588 based synchronization scheme by utilizing additional packets with different sizes to overcome these problems, without adding hardware or overheads. Based on the proposed scheme, this paper derives the maximum likelihood estimators (MLEs) of the clock offset and analyzes the corresponding Cramer-Rao lower bounds (CRLBs) for both Gaussian and exponential random delay models. The performance of the proposed estimator is evaluated in two scenarios with different random delay distribution. The impact of the size of the transmitted packets is studied by simulation. The results show that the proposed scheme and estimators can successfully overcome the detrimental effect of the asymmetric link and random delay problems. The synchronization accuracy of the proposed scheme significantly outperforms both the conventional IEEE 1588 scheme and an existing method in terms of clock offset bias error without the need of extra hardware.