Low power sigma delta converter with SAR ADC for audio frequencies

A low power second order feedforward sigma delta converter is described in this paper. A 3 bit SAR is used in the design as ADC and the coefficients of the SAR are used to sum the feedforward signals in the design. A telescopic cascode opamp is used as integrator. As a result, 76.8dB SNR is achieved with 20μW power consumption for 25kHz signal bandwidth and 32 OSR in 0.18μm CMOS technology.