A 20 μV/°C digital offset compensation technique for comparators and differential amplifiers

Digital offset compensation has been widely used for start-up calibration of analog ICs. It can be valuable in the design of an offset control circuit that has a minimal dependence on temperature. This eliminates the need to recalibrate the circuit during normal operation when the temperature may randomly fluctuate. This paper presents a g
_m
-tracking technique used in an offset correction loop that drifts only 20 μV/°C over a temperature range of 0°C to 100°C. Test circuits fabricated in a 40 nm CMOS technology confirm the performance of the proposed technique.