The effect of varying the Cu/Au ratio on the thermal-cycle fatigue life of 95/5 PbSn bumps

The MICRO SWITCH Division of Honeywell adopted the IBM C4 flip chip die attach method for its underhood automotive applications in the mid to late 1970's. There has been a gradual increase in the reliability of IC-ceramic solder joints. This experiment shows the effect of the interface metallurgy on the thermal-cycle fatigue life of C4 technology. Samples are manufactured using a standard industry technique first pioneered by IBM. Included are results from initial experimentation on post processed bump limiting metallurgy (BLM), and mechanical data on two different sizes of IC with the variation of gold thickness. Assemblies were exposed to a thermal-cycle temperature range of -40/spl deg/C to 150/spl deg/C. In the initial tests, half of each wafer is placed in 1/1 concentrated H/sub 2/O/sub 2//Acetic to remove the PbSn bump and expose the BLM. The etched samples are SEM/EDS analyzed for interfacial constituents. A comparison of the interface morphologies and the thermal-cycle fatigue life are shown. These results show that for extended thermal-cycle life times (>1000) that the Cu thickness of 1.2 /spl mu/m and an Au thickness of 0.08 /spl mu/m which is reduced from the initial 0.15 /spl mu/m of our standard process is optimal. This is due to the reduced Au incorporation in the copper-tin intermetallic which produces an increase in the fatigue life and strength of the joints.