A fault-tolerant embedded microcontroller testbed

The paper presents a design approach for implementing a fault-tolerant embedded computing node based on the use of low-cost commodity microcontrollers. A combination of software and relatively simple external logic is used to implement fault-tolerance in a redundant set of microcontrollers. A node can be protected with different amounts of redundancy (duplex, triplex, hybrid) depending upon the needs of its host subsystem, and is intended to be interconnected with other nodes into a modular distributed network. The structure of the node, and fault detection and recovery algorithms are described, along with a description of an experimental testbed that is being implemented.