Invited Talk: The Application of Wafer-Scale Technology to Neuromorphic Systems

A design approach is proposed for building wafer-scale neuromorphic systems in which the application specific architecture is laser-programmed using additive linking structures to interconnect synaptic weights realized with multiplying analog-to-digital converters. Chip level arrays have been fabricated using two different circuit configurations and small networks have been built and studied. Major unresolved issues include determination of resolution for synaptic weights during learning, development of circuits for on-chip learning, and optimization of tradeoffs among component speed, parallelism and power dissipation.