Low standoff Chip to Wafer bonding

Industry is moving towards having module with multiple functions and capabilities in order to satisfy consumer demands. Miniaturized the package will allowed more components to pack inside the electronic gadget. A low z-foot print of the package is one of the approaches to miniaturize the package. The adoption of micro-bump solders in the chip allowed low standoff Chip to Wafer (C2W) solder interconnects. The chip used in this study is of size 12mm × 12mm × 0.07mm and consists of array of micro-solder bumps at 80µm pitch and 50µm UBM diameter. The wafer is of 200mm diameter and 0.7mm thick.