A new digital to analog converter resistor string architecture

This paper introduces a resistor string architecture for implementing a digital to analog converter on a CMOS circuit process. The proposed circuit maintains the advantages of guaranteed monotonicity inherent in previous resistor string architectures but provides a higher efficiency of resistor usage. Using "virtual resistance coding" it is possible to obtain a very high integral and differential linearities (/spl sim/0% LSB). Likewise, this DAC architecture requires only one buffer amplifier, offering potential high-speed operation.