Realizing and and or Functions With Single Vertical-Slit Field-Effect Transistor

This letter experimentally demonstrates and and or functionalities with a single MOS transistor. Device architecture and fabrication follow the recent work on fabrication-based feasibility assessment of junctionless vertical-slit field-effect transistor. Slit width variation is used to realize a particular functionality-wider for or function and narrower for and function. The fabricated n-type devices with the and and or functionalities exhibit good electrical performance: low off current (<; 5 pA/μm) and high I
_ON
/I
_OFF
ratio (>; 10
⁶
). Furthermore, we briefly discuss the implication of these devices in CMOS NAND logic implementation.